本章节包含以下几部分内容:
■ 时钟网络(第5-1页)
■ Cyclone IV器件中的PLL(第5-18页)
■ Cyclone IV PLL硬件概述(第5-20页)
■ 时钟反馈模式(第5-23页)
■ 硬件特性(第5-26页)
■ 可编程带宽(第5-32页)
■ 相移的实现(第5-32页)
■ PLL级联(第5-33页)
■ PLL重配置(第5-34页)
■ 扩频时钟(第5-41页)
■ PLL规范(第5-41页)
时钟网络
Cyclone IV GX器件提供了多达12个专用时钟管脚(CLK[15..4]),以用于驱动全局时
钟(GCLKs)。Cyclone IV GX器件的每一侧(左侧除外)支持四个专用时钟管脚,这些
时钟管脚能够驱动高达30个GCLK。
Cyclone IV E器件提供了多达15个专用时钟管脚 (CLK[15..1]),以用于驱动高达20
个GCLK。Cyclone IV E器件的左侧支持三个专用时钟管脚,在顶端、底部及右侧支持
四个专用时钟管脚(EP4CE6与EP4CE10器件除外)。EP4CE6和EP4CE10器件仅在器件
左侧支持三个专用时钟管脚,在器件右侧支持四个专用时钟引脚。
© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its
semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service
described herein except as expreSSLy agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying
on any published information and before placing orders for products or services.