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[资料] S5K5CAG(datasheet)

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深圳市新移科技有限公司
发表于 2014-2-11 14:01:03 | 显示全部楼层 |阅读模式 来自 广东省深圳市
1 OVERVIEW
The S5K5CAG is a highly integrated Quadruple XGA (QXGA) camera chip that includes a CMOS image sensor (CIS), Image Signal Processor (ISP) and JPEG on the fly. It is fabricated by the SAMSUNG 90nm CMOS image sensor process developed for imaging applications, to realize a high-efficiency and low-power photo sensor. The sensor consists of 2048 x 1536 effective pixels that meet with the 1/5-inch optical format. The CIS has on-chip 10-bit ADC arrays to digitize the pixel output and also on-chip Correlated Double Sampling (CDS) to reduce Fixed Pattern Noise (FPN) drastically. The ISP performs sophisticated image processing functions including color recovery and correction, edge enhancement, lens shading correction, programmable gamma correction, auto defect correction, auto flicker correction, auto focus (AF), auto exposure (AE), auto white balance (AWB), and image scaling. The AF, AE and AWB functions are performed by an embedded RISC processor. The host controller is able to access and control this device via the I2C bus. The S5K5CAG is MIPI CSI2-compliant and also 8-Bit ITU-R 656/601 parallel interfaces, and suitable for a low power camera module with a 2.8V/1.8V power supply.


2 FEATURES
• QXGA format sensor with 1/5"optics
• Pixel size: 1.4 um
• Effective resolution: 2048 (H) x 1536 (V), QXGA
• Full resolution @ 15 fps, VGA @ 30fps
• JPEG on-the-fly compression with embedded JPEG file size control
• JPEG image rotation support
• Embedded SpeedTag for Fast JPEG Management by Scalado SpeedView
• MIPI CSI2 (single lane)
• 10-bit parallel video interface, 8-Bit ITU-R.656/601
• Output formats: YUV422, RGB565, RGB888, RAW8, RAW10, Processed Bayer, JPEG, Interleaved JPEG8 (SOSI,EOSI,SOEI,EOEI), Interleaved JPEG/Video (by data type).
• Continuous pseudo zoom
• Standard frame spoof mode for JPEG8. Status and Pointers to interleaved video lines embedded in frame footer.
• Fully integrated and programmable Image Signal Processor (ISP)
• Automatic adjustment to diverse lighting conditions
• Auto focus supports single shot or tracking focus for continuous operation
• Low-power HW and SW standby modes, as well as low power reduced resolution modes.
• Xenon and Led flash support
• Embedded PLL enables fine output data rate clock freq control, with an input clock frequency of 6MHz-56MHz
• Variable frame rate up to 15fps for QXGA and up to 30fps for VGA
• Slave Serial Control interface: I2C-compatible interface with host for programming and register read-back
• Master serial control interface I2C-compatible interface or PWM interface for control of auto focus driver IC
• On chip OTP memory to support Chip ID (48 bit) and module to module compensation (192 bit)
• Operating temperature: -20°C to +60°C
• Supply voltage: 2.8V for analog and 2.8V or 1.8V for I/O, 1.5V(regulated from 1.8V) for digital core supply



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发表于 2014-12-20 09:37:31 | 显示全部楼层 来自 上海市
谢谢啦!!
发表于 2015-1-16 16:13:21 | 显示全部楼层 来自 浙江省金华市
good, thanks!
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发表于 2015-1-19 15:39:41 | 显示全部楼层 来自 广东省深圳市
very good,thanks
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发表于 2015-10-11 14:51:01 | 显示全部楼层 来自 广东省深圳市
楼主有没有 JPEG 输出的初始化代码
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