MTK MT6983 5G手机应用处理器软件注册表:系统级缓存/缓冲区

buwan11

Module name: NSLC_REG Base address: (+0x10342000)
Module name: SSLC_REG Base address: (+0x10343000)

Address	Name	Width	Register Function
10342000	slb_si	32	SLB SI Register
10342004	slc_cmd_con	32	SLC Control Register
10342008	slc_arb_con	32	SLC Arbitration Setting
1034200C	slc_dss_ctl	32	SLC DSS Control
10342010	slc_way_dis_ctl	32	SLC Way Disabling Control
10342014	sram_int_clr	32	SRAM Parity Error Interrupt
10342018	slc_bist_ctrl	32	SLC BIST  Control
10342020	slc_way_rsv_ctl0	32	SLC Way Reservation Control 0
10342024	slc_way_rsv_ctl1	32	SLC Way Reservation Control 1
10342028	slc_way_rsv_ctl2	32	SLC Way Reservation Control 2
1034202C	slc_way_rsv_ctl3	32	SLC Way Reservation Control 3
10342030	slc_way_rsv_ctl4	32	SLC Way Reservation Control 4
10342034	slc_way_rsv_ctl5	32	SLC Way Reservation Control 5
10342038	slc_way_rsv_ctl6	32	SLC Way Reservation Control 6
1034203C	slc_way_rsv_ctl7	32	SLC Way Reservation Control 7
10342040	slc_way_rsv_ctl8	32	SLC Way Reservation Control 8
10342044	slc_way_rsv_ctl9	32	SLC Way Reservation Control 9
10342048	slc_way_rsv_ctl10	32	SLC Way Reservation Control 10
1034204C	slc_way_rsv_ctl11	32	SLC Way Reservation Control 11
10342050	slc_way_rsv_ctl12	32	SLC Way Reservation Control 12
10342054	slc_way_rsv_ctl13	32	SLC Way Reservation Control 13
10342058	slc_way_rsv_ctl14	32	SLC Way Reservation Control 14
1034205C	slc_way_rsv_ctl15	32	SLC Way Reservation Control 15
10342080	slc_dswq_ctrl0	32	SLC Data Switch Queue Control 0
10342084	Tag_debug_ctrl	32	Tag Debug Control
10342088	slc_last_slc_ctrl	32	SLC Last SLC Control
10342090	slc_spare0_low	32	SLC ECO0
10342094	slc_spare1_low	32	SLC ECO1
10342098	slc_spare2_low	32	SLC ECO2
1034209C	slc_spare3_high	32	SLC ECO3
10342100	slc_pmu_cnt0_filter0	32	SLC_pmu_cnt0_filter0
10342104	slc_pmu_cnt0_filter1	32	SLC_pmu_cnt0_filter1
10342108	slc_pmu_cnt0_bw_lat_sel	32	slc_pmu_cnt0_bandwidth_latency_select
10342110	slc_pmu_cnt1_filter0	32	SLC_pmu_cnt1_filter0
10342114	slc_pmu_cnt1_filter1	32	SLC_pmu_cnt1_filter1
10342118	slc_pmu_cnt1_bw_lat_sel	32	slc_pmu_cnt1_bandwidth_latency_select
10342120	slc_pmu_cnt2_filter0	32	SLC_pmu_cnt2_filter0
10342124	slc_pmu_cnt2_filter1	32	SLC_pmu_cnt2_filter1
10342128	slc_pmu_cnt2_bw_lat_sel	32	slc_pmu_cnt2_bandwidth_latency_select
10342130	slc_pmu_cnt3_filter0	32	SLC_pmu_cnt3_filter0
10342134	slc_pmu_cnt3_filter1	32	SLC_pmu_cnt3_filter1
10342138	slc_pmu_cnt3_bw_lat_sel	32	slc_pmu_cnt3_bandwidth_latency_select
10342140	slc_pmu_cnt4_filter0	32	SLC_pmu_cnt4_filter0
10342144	slc_pmu_cnt4_filter1	32	SLC_pmu_cnt4_filter1
10342148	slc_pmu_cnt4_bw_lat_sel	32	slc_pmu_cnt4_bandwidth_latency_select
10342150	slc_pmu_cnt5_filter0	32	SLC_pmu_cnt5_filter0
10342154	slc_pmu_cnt5_filter1	32	SLC_pmu_cnt5_filter1
10342158	slc_pmu_cnt5_bw_lat_sel	32	slc_pmu_cnt5_bandwidth_latency_select
10342160	slc_pmu_cnt6_filter0	32	SLC_pmu_cnt6_filter0
10342164	slc_pmu_cnt6_filter1	32	SLC_pmu_cnt6_filter1
10342168	slc_pmu_cnt6_bw_lat_sel	32	slc_pmu_cnt6_bandwidth_latency_select
10342170	slc_pmu_cnt7_filter0	32	SLC_pmu_cnt7_filter0
10342174	slc_pmu_cnt7_filter1	32	SLC_pmu_cnt7_filter1
10342178	slc_pmu_cnt7_bw_lat_sel	32	slc_pmu_cnt7_bandwidth_latency_select
10342180	slc_pmu_cnt8_filter0	32	SLC_pmu_cnt8_filter0
10342184	slc_pmu_cnt8_filter1	32	SLC_pmu_cnt8_filter1
10342188	slc_pmu_cnt8_bw_lat_sel	32	slc_pmu_cnt8_bandwidth_latency_select
10342190	slc_pmu_cnt9_filter0	32	SLC_pmu_cnt9_filter0
10342194	slc_pmu_cnt9_filter1	32	SLC_pmu_cnt9_filter1
10342198	slc_pmu_cnt9_bw_lat_sel	32	slc_pmu_cnt9_bandwidth_latency_select
103421A0	slc_pmu_cnt10_filter0	32	SLC_pmu_cnt10_filter0
103421A4	slc_pmu_cnt10_filter1	32	SLC_pmu_cnt10_filter1
103421A8	slc_pmu_cnt10_bw_lat_sel	32	slc_pmu_cnt10_bandwidth_latency_select
103421B0	slc_pmu_cnt11_filter0	32	SLC_pmu_cnt11_filter0
103421B4	slc_pmu_cnt11_filter1	32	SLC_pmu_cnt11_filter1
103421B8	slc_pmu_cnt11_bw_lat_sel	32	slc_pmu_cnt11_bandwidth_latency_select
103421C0	slc_pmu_cnt12_filter0	32	SLC_pmu_cnt12_filter0
103421C4	slc_pmu_cnt12_filter1	32	SLC_pmu_cnt12_filter1
103421C8	slc_pmu_cnt12_bw_lat_sel	32	slc_pmu_cnt12_bandwidth_latency_select
103421D0	slc_pmu_cnt13_filter0	32	SLC_pmu_cnt13_filter0
103421D4	slc_pmu_cnt13_filter1	32	SLC_pmu_cnt13_filter1
103421D8	slc_pmu_cnt13_bw_lat_sel	32	slc_pmu_cnt13_bandwidth_latency_select
103421E0	slc_pmu_cnt14_filter0	32	SLC_pmu_cnt14_filter0
103421E4	slc_pmu_cnt14_filter1	32	SLC_pmu_cnt14_filter1
103421E8	slc_pmu_cnt14_bw_lat_sel	32	slc_pmu_cnt14_bandwidth_latency_select
103421F0	slc_pmu_cnt15_filter0	32	SLC_pmu_cnt15_filter0
103421F4	slc_pmu_cnt15_filter1	32	SLC_pmu_cnt15_filter1
103421F8	slc_pmu_cnt15_bw_lat_sel	32	slc_pmu_cnt15_bandwidth_latency_select
10342200	slc_pmu_cnt16_filter0	32	SLC_pmu_cnt16_filter0
10342204	slc_pmu_cnt16_filter1	32	SLC_pmu_cnt16_filter1
10342208	slc_pmu_cnt16_bw_lat_sel	32	slc_pmu_cnt16_bandwidth_latency_select
10342210	slc_pmu_cnt17_filter0	32	SLC_pmu_cnt17_filter0
10342214	slc_pmu_cnt17_filter1	32	SLC_pmu_cnt17_filter1
10342218	slc_pmu_cnt17_bw_lat_sel	32	slc_pmu_cnt17_bandwidth_latency_select
10342220	slc_pmu_cnt18_filter0	32	SLC_pmu_cnt18_filter0
10342224	slc_pmu_cnt18_filter1	32	SLC_pmu_cnt18_filter1
10342228	slc_pmu_cnt18_bw_lat_sel	32	slc_pmu_cnt18_bandwidth_latency_select
10342230	slc_pmu_cnt19_filter0	32	SLC_pmu_cnt19_filter0
10342234	slc_pmu_cnt19_filter1	32	SLC_pmu_cnt19_filter1
10342238	slc_pmu_cnt19_bw_lat_sel	32	slc_pmu_cnt19_bandwidth_latency_select
10342240	slc_pmu_cnt20_filter0	32	SLC_pmu_cnt20_filter0
10342244	slc_pmu_cnt20_filter1	32	SLC_pmu_cnt20_filter1
10342248	slc_pmu_cnt20_bw_lat_sel	32	slc_pmu_cnt20_bandwidth_latency_select
10342250	slc_pmu_cnt21_filter0	32	SLC_pmu_cnt21_filter0
10342254	slc_pmu_cnt21_filter1	32	SLC_pmu_cnt21_filter1
10342258	slc_pmu_cnt21_bw_lat_sel	32	slc_pmu_cnt21_bandwidth_latency_select
10342260	slc_pmu_cnt22_filter0	32	SLC_pmu_cnt22_filter0
10342264	slc_pmu_cnt22_filter1	32	SLC_pmu_cnt22_filter1
10342268	slc_pmu_cnt22_bw_lat_sel	32	slc_pmu_cnt22_bandwidth_latency_select
10342270	slc_pmu_cnt23_filter0	32	SLC_pmu_cnt23_filter0
10342274	slc_pmu_cnt23_filter1	32	SLC_pmu_cnt23_filter1
10342278	slc_pmu_cnt23_bw_lat_sel	32	slc_pmu_cnt23_bandwidth_latency_select
10342280	slc_pmu_cnt24_filter0	32	SLC_pmu_cnt24_filter0
10342284	slc_pmu_cnt24_filter1	32	SLC_pmu_cnt24_filter1
10342288	slc_pmu_cnt24_bw_lat_sel	32	slc_pmu_cnt24_bandwidth_latency_select
10342290	slc_pmu_cnt25_filter0	32	SLC_pmu_cnt25_filter0
10342294	slc_pmu_cnt25_filter1	32	SLC_pmu_cnt25_filter1
10342298	slc_pmu_cnt25_bw_lat_sel	32	slc_pmu_cnt25_bandwidth_latency_select
103422A0	slc_pmu_cnt26_filter0	32	SLC_pmu_cnt26_filter0
103422A4	slc_pmu_cnt26_filter1	32	SLC_pmu_cnt26_filter1
103422A8	slc_pmu_cnt26_bw_lat_sel	32	slc_pmu_cnt26_bandwidth_latency_select
103422B0	slc_pmu_cnt27_filter0	32	SLC_pmu_cnt27_filter0
103422B4	slc_pmu_cnt27_filter1	32	SLC_pmu_cnt27_filter1
103422B8	slc_pmu_cnt27_bw_lat_sel	32	slc_pmu_cnt27_bandwidth_latency_select
103422C0	slc_pmu_cnt28_filter0	32	SLC_pmu_cnt28_filter0
103422C4	slc_pmu_cnt28_filter1	32	SLC_pmu_cnt28_filter1
103422C8	slc_pmu_cnt28_bw_lat_sel	32	slc_pmu_cnt28_bandwidth_latency_select
103422D0	slc_pmu_cnt29_filter0	32	SLC_pmu_cnt29_filter0
103422D4	slc_pmu_cnt29_filter1	32	SLC_pmu_cnt29_filter1
103422D8	slc_pmu_cnt29_bw_lat_sel	32	slc_pmu_cnt29_bandwidth_latency_select
103422E0	slc_pmu_cnt30_filter0	32	SLC_pmu_cnt30_filter0
103422E4	slc_pmu_cnt30_filter1	32	SLC_pmu_cnt30_filter1
103422E8	slc_pmu_cnt30_bw_lat_sel	32	slc_pmu_cnt30_bandwidth_latency_select
103422F0	slc_pmu_cnt31_filter0	32	SLC_pmu_cnt31_filter0
103422F4	slc_pmu_cnt31_filter1	32	SLC_pmu_cnt31_filter1
103422F8	slc_pmu_cnt31_bw_lat_sel	32	slc_pmu_cnt31_bandwidth_latency_select
10342300	slc_pmu_ctrl_set0_set7	32	slc_pmu_control_set0_to_set7
10342304	slc_pmu_ctrl_set8_set15	32	slc_pmu_control_set8_to_set15
10342308	slc_pmu_ctrl_set16_set23	32	slc_pmu_control_set16_to_set23
1034230C	slc_pmu_ctrl_set24_set31	32	slc_pmu_control_set24_to_set31

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