Module name: UART0 Base address: (+0x11001000)
Module name: UART1 Base address: (+0x11002000)
Module name: UART2 Base address: (+0x11003000)
Module name: UART3 Base address: (+0x11004000)
Address | Name | Width | Register Function |
11001000 | RBR | 8 | Rx Buffer Register |
11001004 | IER | 8 | Interrupt Enable Register |
11001000 | THR | 8 | Tx Holding Register |
11001008 | IIR | 8 | Interrupt Identification Register |
1100100C | LCR | 8 | Line Control Register |
11001008 | FCR | 8 | FIFO Control Register |
11001010 | MCR | 8 | Modem Control Register |
11001014 | LSR | 8 | Line Status Register |
11001018 | MSR | 8 | Modem Status Register |
1100101C | SCR | 8 | Scratch Register |
11001090 | DLL | 8 | Divisor Latch (LS) |
11001094 | DLM | 8 | Divisor Latch (MS) |
11001098 | EFR | 8 | Enhanced Feature Register |
110010A0 | XON1 | 8 | XON1 Character Register |
110010A4 | XON2 | 8 | XON2 Character Register |
110010A8 | XOFF1 | 8 | XOFF1 Character Register |
110010AC | XOFF2 | 8 | XOFF2 Character Register |
11001020 | AUTOBAUD_EN | 8 | Auto Baud Detect Enable Register |
11001024 | HIGHSPEED | 8 | High Speed Mode Register |
11001028 | SAMPLE_COUNT | 8 | Sample Counter Register |
1100102C | SAMPLE_POINT | 8 | Sample Point Register |
11001030 | AUTOBAUD_REG | 8 | Auto Baud Monitor Register |
11001034 | RATEFIX_AD | 8 | Clock Rate Fix Register |
11001038 | AUTOBAUDSAMPLE | 8 | Auto Baud Sample Register |
1100103C | GUARD | 8 | Guard Time Added Register |
11001040 | ESCAPE_DAT | 8 | Escape Character Register |
11001044 | ESCAPE_EN | 8 | Escape Enable Register |
11001048 | SLEEP_EN | 8 | Sleep Enable Register |
1100104C | DMA_EN | 8 | DMA Enable Register |
11001050 | RXTRI_AD | 8 | Rx Trigger Address |
11001054 | FRACDIV_L | 8 | Fractional Divider LSB Address |
11001058 | FRACDIV_M | 8 | Fractional Divider MSB Address |
1100105C | FCR_RD | 8 | FIFO Control Register |
1100109C | FEATURE_SEL | 8 | UART Feature Select Register |
110010B4 | SLEEP_REQ | 8 | UART Sleep Request Register |
110010B8 | SLEEP_ACK | 8 | UART Idle Register |